With the relentless drive to reduce cost, size, and power consumption while at the same time achieving performance goals, chip design issues (a.k.a. Very Large Scale Integrated Circuit Design concerns) are at the center of electronics industry. CMOS digital circuit design, simulation, and layout flow will be introduced in this course, and applied in assignments using state-of-the-art CAD tools commonly used in the VLSI design industry. Students will use design metrics such as size, speed, power dissipation, energy, and reliability to optimize IC design. Special subsystems (memory, packaging, I/Os, power and clock distributions), testability issues, and few common analog IC building blocks will finally be discussed as time allows.