This course is designed to provide the students with a research-oriented point of view on computer networking under time/resource/performance constraints. The first part of the course is dedicated to high-speed router and switch design with Quality of Service support. We consider both switches in the backbone networks and on-chip networks. The second part of the course focuses on networks for embedded systems with real-time performance guarantees. Both parts of the course include scheduling algorithms to achieve performance guarantees. The course follows both fundamental and recent research papers. The students are expected to perform paper readings and reviews as well as a term project.